LOW COST BOARD LAYOUT TECHNIQUES FOR DESIGNING WITH PLDS IN BGA PACKAGES
This resource is published by Lattice Semiconductor Corporation
Programmable logic devices (PLDs) offer inherent time-to-market and design flexibility advantages over application specific integrated circuits (ASICs) and application specific standard products (ASSPs).
The increasing complexity of system requirements has driven the need to increase the logic density and I/O pins of PLDs. As a result, the Ball Grid Array (BGA) has become the package of choice for PLDs. BGA options such as chip scale BGA, fine pitch BGA and chip array BGA have largely replaced most quad flat package (QFP) options on most PLDs.
Download this whitepaper to learn more.