Rohde & Schwarz Inc.
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DDR Memory System Design Verification and Debug!

Published by Rohde & Schwarz Inc.

Design and verification engineers will be learning the importance of ensuring a stable operation and of reducing the risk of failure after any change over the product’s lifetime. Both require a solid characterization of the memory interface.

We will be discussing test and tool requirements such as bandwidth, trigger and probing, which help with identifying jitter, timing and noise issues. With the help of the R&S®RTP high-performance oscilloscope, we will showcase practical measurement examples.

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Related Categories Components, Embedded, Communication, Resistors, SMD passives, Capacitors, Inductors, Connectors, Switches, Wireless networking ICs and modules, Near-Field Communication (NFC), Sub-GHz/ISM-band radio, Cellular, LPWAN technologies, Transformers, PCB-substrate technology, Microcontrollers, Development and debug tools, Evaluation boards, SBCs and modules, Embedded operating systems and software, Edge computing

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